View MAX1496EAI_393690.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-3166; Rev 0; 1/04
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
General Description
The MAX1447/MAX1496/MAX1498 low-power, 3.5- and 4.5-digit, analog-to-digital converters (ADCs) with integrated light-emitting diode (LED) drivers operate from a single 2.7V to 5.25V power supply. They include an internal reference, a high-accuracy on-chip oscillator, and a multiplexed LED display driver. An internal charge pump generates the negative supply needed to power the integrated input buffers for single-supply operation. The ADC is configurable for either a 2V or 200mV input range and it outputs its conversion results to an LED. The MAX1496 is a 3.5-digit (1999 count) device and the MAX1447/MAX1498 are 4.5-digit (19,999 count) devices. The MAX1447/MAX1496/MAX1498 do not require external precision integrating capacitors, autozero capacitors, crystal oscillators, charge pumps, or other circuitry required with dual-slope ADCs (commonly used in panel meter circuits). These devices also feature on-chip buffers for the differential signal and reference input, allowing direct interface with high-impedance signal sources. In addition, they use continuous internal offset-calibration and offer >100dB rejection of 50Hz and 60Hz line noise. Other features include data hold and peak detection and overrange/underrange detection. The MAX1447 features on-demand enhanced offset calibration for improved offset performance. The MAX1447/MAX1498 are available in a 32-pin, 7mm 7mm TQFP package and the MAX1496 is available in 28-pin SSOP and 28-pin PDIP packages. All devices in this family operate over the -40C to +85C extended temperature range.
Features
High Resolution MAX1447/MAX1498: 4.5 Digits (19,999 Count) MAX1496: 3.5 Digits (1999 Count) Sigma-Delta ADC Architecture No Integrating Capacitors Required No Autozeroing Capacitors Required >100dB of Simultaneous 50Hz and 60Hz Rejection Selectable Input Range of 200mV or 2V Selectable Voltage Reference: Internal 2.048V or External Internal High-Accuracy Oscillator Needs No External Components Automatic Offset Calibration On-Demand Enhanced Offset Calibration (MAX1447) Operate from a Single 2.7V to 5.25V Supply Low Power (Exclude LED-Driver Current) Maximum 744A Operating Current (MAX1496) Maximum 960A Operating Current (MAX1447/MAX1498) Maximum 325A Shutdown Current Multiplexed Common-Cathode LED Drivers Resistor-Programmable Segment Current Small 32-Pin, 7mm x 7mm TQFP Package (4.5 Digits), 28-Pin SSOP Package (3.5 Digits) Also Available in a PDIP Package (3.5 Digits)
MAX1447/MAX1496/MAX1498
Applications
Digital Panel Meters Hand-Held Meters Digital Voltmeters Digital Multimeters
Pin Configurations appear at end of data sheet.
PART MAX1447ECJ MAX1496EAI* MAX1496EPI MAX1498ECJ
Ordering Information
TEMP RANGE PINRESOLUTION PACKAGE (DIGITS) 4.5 3.5 3.5 4.5
-40C to +85C 32 TQFP -40C to +85C 28 SSOP -40C to +85C 28 PDIP -40C to +85C 32 TQFP
*Future product--contact factory for availability.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
ABSOLUTE MAXIMUM RATINGS
AVDD to GND (MAX1447/MAX1498) ........................-0.3V to +6V DVDD to GND (MAX1447/MAX1498)........................-0.3V to +6V AIN+, AIN- to GND (MAX1447/MAX1498) ......................VNEG to (AVDD to +0.3V) REF+, REF- to GND (MAX1447/MAX1498) ..................... VNEG to (AVDD to +0.3V) INTREF, RANGE, DPSET1, DPSET2, HOLD, PEAK, DPON to GND (MAX1447/MAX1498) ..-0.3V to (DVDD + 0.3V) VNEG to GND (MAX1447/MAX1498).......-2.6V to (AVDD + 0.3V) LED_EN to GND (MAX1447/MAX1498) ...-0.3V to (DVDD + 0.3V) ISET to GND (MAX1447/MAX1498) .........-0.3V to (AVDD + 0.3V) VDD to GND (MAX1496) ...........................................-0.3V to +6V AIN+, AIN- to GND (MAX1496)..............VNEG to (VDD to +0.3V) REF+, REF- to GND (MAX1496) ........... VNEG to (VDD to +0.3V) INTREF, RANGE, DPSET1, DPSET2, HOLD, PEAK, DPON to GND (MAX1496) .....................-0.3V to (VDD + 0.3V) VNEG to GND (MAX1496)..........................-2.6V to (VDD + 0.3V) ISET to GND (MAX1496) ............................-0.3V to (VDD + 0.3V) VLED to GLED ..........................................................-0.3V to +6V GLED to GND ........................................................-0.3V to +0.3V SEG_ to GLED..........................................-0.3V to (VLED + 0.3V) DIG_ to GLED ..........................................-0.3V to (VLED + 0.3V) DIG_ Sink Current .............................................................300mA DIG_ Source Current...........................................................50mA SEG_ Sink Current ..............................................................50mA SEG_ Source Current..........................................................50mA Maximum Current Input into Any Other Pin ........................50mA Continuous Power Dissipation (TA = +70C) 32-Pin TQFP (derate 20.7mW/C above +70C).....1652.9mW 28-Pin SSOP (derate 9.5mW/C above +70C) ...........762mW 28-Pin PDIP (derate 14.3mW/C above +70C)......1142.9mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-60C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AVDD = DVDD = VDD = +2.7V to +5.25V, GND = 0, VLED = +2.7V to +5.25V, GLED = 0, VREF+ - VREF- = 2.048V (external reference), CREF+ = CREF- = 0.1F, CVNEG = 0.1F. Internal clock mode, unless otherwise noted. All specifications are at TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER DC ACCURACY Noise-Free Resolution Integral Nonlinearity (Note 1) Range Change Ratio Rollover Error Output Noise Offset Error (Zero Input Reading) Gain Error Offset Drift (Zero Reading Drift) Gain Drift INPUT CONVERSION RATE Conversion Rate 5 Hz Offset VIN = 0 (Note 2) (Note 3) VIN = 0 (Note 4) -0 -0.5 0.1 1 INL MAX1447/MAX1498 MAX1496 2.000V range 200mV range (VAIN+ - VAIN- = 0.100V) on 200mV range (VAIN+ - VAIN- = 0.100V) on 2.0V range VAIN+ - VAIN- = full scale VAIN- - VAIN+ = full scale -19,999 -1999 1 1 10:1 1 10 0 +0.5 +19,999 +1999 Counts Counts Ratio Counts VP-P Readings % FSR V/C ppm/C SYMBOL CONDITIONS MIN TYP MAX UNITS
2
_______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = VDD = +2.7V to +5.25V, GND = 0, VLED = +2.7V to +5.25V, GLED = 0, VREF+ - VREF- = 2.048V (external reference), CREF+ = CREF- = 0.1F, CVNEG = 0.1F. Internal clock mode, unless otherwise noted. All specifications are at TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER SYMBOL RANGE = GND AIN Input Voltage Range (Note 5) AIN Absolute Input Voltage Range to GND Normal-Mode 50Hz and 60Hz Rejection (Simultaneously) Common-Mode 50Hz and 60Hz Rejection (Simultaneously) Common-Mode Rejection Input Leakage Current Input Capacitance Average Dynamic Input Current (Note 6) -20 CMR CMR 50Hz and 60Hz 2% For 50Hz and 60Hz 2%, RSOURCE < 10k At DC RANGE = DVDD (MAX1447/MAX1498) or VDD (MAX1496) CONDITIONS MIN -2.0 -0.2 -2.2 100 150 100 10 10 +20 TYP MAX +2.0 +0.2 +2.2 V UNITS
MAX1447/MAX1496/MAX1498
ANALOG INPUTS (AIN+, AIN-) (bypass to GND with 0.1F or greater capacitors)
V dB dB dB nA pF nA
INTERNAL REFERENCE (REF- = GND, INTREF = DVDD (MAX1447/MAX1498) or VDD (MAX1496) (bypass REF+ to GND with a 4.7F capacitor) REF Output Voltage REF Output Short-Circuit Current REF Output Temperature Coefficient Load Regulation Line Regulation Noise Voltage 0.1Hz to 10Hz 10Hz to 10kHz Differential, VREF+ - VREF-2.2 50Hz and 60Hz 2% CMR CMR For 50Hz and 60Hz 2%, RSOURCE < 10k At DC 100 150 100 10 10 (Note 6) -20 +20 TCVREF ISOURCE = 0 to 300A, ISINK = 0 to 30A VREF 2.007 2.048 1 40 6 50 25 400 2.048 +2.2 2.089 V mA ppm/C mV/A V/V VP-P
EXTERNAL REFERENCE (INTREF = GND) (bypass REF+ and REF- to GND with 0.1F or greater capacitors) REF Input Voltage Absolute REF+, REF- Input Voltage to GND Normal-Mode 50Hz and 60Hz Rejection (Simultaneously) Common-Mode 50Hz and 60Hz Rejection (Simultaneously) Common-Mode Rejection Input Leakage Current Input Capacitance Average Dynamic Input Current V V dB dB dB nA pF nA
_______________________________________________________________________________________
3
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = VDD = +2.7V to +5.25V, GND = 0, VLED = +2.7V to +5.25V, GLED = 0, VREF+ - VREF- = 2.048V (external reference), CREF+ = CREF- = 0.1F, CVNEG = 0.1F. Internal clock mode, unless otherwise noted. All specifications are at TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER CHARGE PUMP Output Voltage Input Current VNEG IIN CVNEG = 0.1F to GND VIN = 0 or DVDD = VDD MAX1447/MAX1498 Input Low Voltage VINL MAX1496 MAX1447/MAX1498 Input High Voltage VINH MAX1496 Input Hysteresis POWER SUPPLY (Note 7) VDD Voltage AVDD Voltage DVDD Voltage Power-Supply Rejection VDD Power-Supply Rejection AVDD Power-Supply Rejection DVDD MAX1496 VDD Current (Note 9) VDD AVDD DVDD PSRR PSRRA PSRRD IVDD MAX1496 MAX1447/MAX1498 MAX1447/MAX1498 (Note 8) (Note 8) (Note 8) VDD = 5.25V VDD = 3.3V Standby mode MAX1447/MAX1498 AVDD Current (Note 9) AVDD = 5.25V IAVDD AVDD = 3.3V Standby mode MAX1447/MAX1498 DVDD Current (Note 9) LED Drivers Bias Current DVDD = 5.25V IDVDD DVDD = 3.3V Standby mode From AVDD or VDD 120 2.70 2.70 2.70 80 80 100 664 618 268 744 663 325 640 600 305 320 180 20 A A A A 5.25 5.25 5.25 V V V dB dB dB VHYS 0.7 x DVDD 0.7 x VDD 200 mV -2.60 -10 -2.42 -2.30 +10 0.3 x DVDD 0.3 x VDD V A DIGITAL INPUTS (INTREF, RANGE, PEAK, HOLD, DPSET1, DPSET2, DPON) SYMBOL CONDITIONS MIN TYP MAX UNITS
V
V
4
_______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = VDD = +2.7V to +5.25V, GND = 0, VLED = +2.7V to +5.25V, GLED = 0, VREF+ - VREF- = 2.048V (external reference), CREF+ = CREF- = 0.1F, CVNEG = 0.1F. Internal clock mode, unless otherwise noted. All specifications are at TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER LED DRIVERS (Table 5) LED Supply Voltage LED Shutdown Supply Current LED Supply Current Display Scan Rate Segment Current Slew Rate DIG_ Voltage Low Segment Drive Source Current Matching Segment Drive Source Current Interdigit Blanking Time VLED ISHDN ILED fOSC ISEG/t VDIG ISEG ISEG VLED - VSEG = 0.6V, RISET = 25k 16.0 IDIG_ = 176mA LED driver shutdown mode Seven segments and decimal point on, RISET = 25k MAX1447/MAX1498 MAX1496 176 512 640 25 0.178 3 21.5 4 0.300 10 25.5 2.70 5.25 10 180 V A mA Hz mA/s V % mA s SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX1447/MAX1496/MAX1498
Note 1: Integral nonlinearity is the deviation of the analog value at any code from its theoretical value after nulling the gain error and offset error. Note 2: Offset calibrated. Note 3: Offset nulled. Note 4: Drift error is eliminated by recalibration at the new temperature. Note 5: The input voltage range for the analog inputs is given with respect to the voltage on the negative input of the differential pair. Note 6: VAIN+ or VAIN- = -2.2V to +2.2V. VREF+ or VREF- = -2.2V to +2.2V. All input structures are identical. Production tested on AIN+ and REF+ only. Note 7: Power-supply currents are measured with all digital inputs at either GND or DVDD. Note 8: Measured at DC by changing the power-supply voltage from 2.7V to 5.25V and measuring the effect on the conversion error with external reference. PSRR at 50Hz and 60Hz exceeds 120dB with filter notches at 50Hz and 60Hz (Figure 2). Note 9: LED drivers are disabled.
_______________________________________________________________________________________
5
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Typical Operating Characteristics
(AVDD = DVDD = VDD = VLED = +2.7V to +5.25V, GND = 0, GLED = 0, external reference mode, REF+ = 2.048V, REF- = GND, RANGE = 1, internal clock mode, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE (MAX1447/MAX1498)
MAX1447/96/98 toc01
SUPPLY CURRENT vs. SUPPLY VOLTAGE (MAX1496)
MAX1447/96/98 toc02
SUPPLY CURRENT vs. TEMPERATURE (MAX1447/MAX1498)
MAX1447/96/98 toc03
700 600 SUPPLY CURRENT (A) 500 400 300 200 100 0 2.75 3.25 3.75 4.25 4.75 DIGITAL SUPPLY ANALOG SUPPLY
700 650 SUPPLY CURRENT (A) 600 550 500 450 400
700 600 SUPPLY CURRENT (A) ANALOG SUPPLY 500 400 300 200 100 0 DIGITAL SUPPLY
5.25
2.70
3.21
3.72
4.23
4.74
5.25
0
10
20
30
40
50
60
70
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
SUPPLY CURRENT vs. TEMPERATURE (MAX1496)
MAX1447/96/98 toc04
SHUTDOWN CURRENT vs. TEMPERATURE (MAX1447/MAX1498)
MAX1447/96/98 toc05
SHUTDOWN CURRENT vs. TEMPERATURE (MAX1496)
MAX1447/96/98 toc06
700 690 680 SUPPLY CURRENT (A) 670 660 650 640 630 620 610 600 -40 -15 10 35 60
300 250 SHUTDOWN CURRENT (A) 200 150 100 50 DIGITAL SUPPLY 0 ANALOG SUPPLY
350 300 SHUTDOWN CURRENT (A) 250 200 150 100 50 0
85
0
10
20
30
40
50
60
70
-40
-15
10
35
60
85
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE (MAX1447/MAX1498)
MAX1447/96/98 toc07
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE (MAX1496)
MAX1447/96/98 toc08
OFFSET ERROR vs. SUPPLY VOLTAGE (MAX1447/MAX1498)
MAX1447/96/98 toc09
300 250 SHUTDOWN CURRENT (A) 200 150 100 50 DIGITAL SUPPLY 0 2.75 3.25 3.75 4.25 4.75 ANALOG SUPPLY
350 300 SHUTDOWN CURRENT (A) 250 200 150 100 50 0
0.19 0.14 OFFSET ERROR (LSB) 0.09 0.04 -0.01 -0.06 -0.11 -0.16
5.25
2.70
3.21
3.72
4.23
4.74
5.25
2.75
3.25
3.75
4.25
4.75
5.25
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
6
_______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Typical Operating Characteristics (continued)
(AVDD = DVDD = VDD = VLED = +2.7V to +5.25V, GND = 0, GLED = 0, external reference mode, REF+ = 2.048V, REF- = GND, RANGE = 1, internal clock mode, TA = +25C, unless otherwise noted.)
OFFSET ERROR vs. TEMPERATURE (MAX1447/MAX1498)
MAX1447/96/98 toc10
GAIN ERROR vs. SUPPLY VOLTAGE (MAX1447/MAX1498)
MAX1447/96/98 toc11
GAIN ERROR vs. TEMPERATURE (MAX1447/MAX1498)
-0.01 GAIN ERROR (% FULL SCALE) -0.02 -0.03 -0.04 -0.05 -0.06 -0.07 -0.08 -0.09
MAX1447/96/98 toc12
0.6 0.5 OFFSET ERROR (LSB) 0.4 0.3 0.2 0.1 0 -0.1 -0.2 0 10 20 30 40 50 60
0.08 0.06 GAIN ERROR (% FULL SCALE) 0.04 0.02 0 -0.02 -0.04 -0.06 -0.08 -0.10
0
70
2.75
3.25
3.75
4.25
4.75
5.25
-0.10 0 10 20 30 40 50 60 70 TEMPERATURE (C)
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
(200mV INPUT RANGE) INL vs. OUTPUT CODE (MAX1447/MAX1498)
MAX1447/96/98 toc13
(2V INPUT RANGE) INL vs. OUTPUT CODE (MAX1447/MAX1498)
MAX1447/96/98 toc14
NOISE DISTRIBUTION
MAX1447/96/98 toc15
1.0
1.0
25
0.5 INL (COUNTS)
0.5 INL (COUNTS)
PERCENTAGE OF UNITS (%)
20
15
0
0
10
-0.5
-0.5
5
-1.0 -20,000
-10,000
0 OUTPUT CODE
10,000
20,000
-1.0 -20,000
0 -10,000 0 OUTPUT CODE 10,000 20,000 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 NOISE COUNTS
INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE
MAX1447/96/98 toc16
INTERNAL REFERENCE VOLTAGE vs. ANALOG SUPPLY VOLTAGE
MAX1447/96/98 toc17
DATA OUTPUT RATE vs. TEMPERATURE
5.08 DATA OUTPUT RATE (Hz) 5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92
MAX1447/96/98 toc18
2.054 2.053 REFERENCE VOLTAGE (V) 2.052 2.051 2.050 2.049 2.048 2.047 2.046 2.045 2.044 0 10 20 30 40 50 60
2.050 2.049 REFERENCE VOLTAGE (V) 2.048 2.047 2.046 2.045 2.044
5.10
4.90 2.75 3.25 3.75 4.25 4.75 5.25 -40 -15 10 35 60 85 SUPPLY VOLTAGE (V) TEMPERATURE (C)
70
TEMPERATURE (C)
_______________________________________________________________________________________
7
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Typical Operating Characteristics (continued)
(AVDD = DVDD = VDD = VLED = +2.7V to +5.25V, GND = 0, GLED = 0, external reference mode, REF+ = 2.048V, REF- = GND, RANGE = 1, internal clock mode, TA = +25C, unless otherwise noted.)
DATA OUTPUT RATE vs. SUPPLY VOLTAGE
MAX1447/96/98 toc19
OFFSET ERROR vs. COMMON-MODE VOLTAGE
0.15 OFFSET ERROR COUNTS 0.10 0.05 0 -0.05 -0.10 -0.15 -0.20 1V/div
MAX1447/96/98 toc20
VNEG STARTUP SCOPE SHOT
MAX1447/96/98 toc21
5.020 5.015 DATA OUTPUT RATE (Hz) 5.010 5.005 5.000 4.995 4.990 4.985 4.980 2.70 3.21 3.72 4.23 4.74
0.20
VDD 2V/div
VNEG
5.25
-2.0 -1.5 -1.0 -0.5
0
0.5
1.0
1.5
2.0
20ms/div
SUPPLY VOLTAGE (V)
COMMON-MODE VOLTAGE (V)
CHARGE-PUMP OUTPUT VOLTAGE vs. ANALOG SUPPLY VOLTAGE
MAX1447/96/98 toc22
SEGMENT CURRENT vs. SUPPLY VOLTAGE
RISET = 25k
MAX1447/96/98 toc23
-2.40
30 25 SEGMENT CURRENT (A) 20 15 10 5 0
-2.42 VNEG VOLTAGE (V)
-2.44
-2.46
-2.48
-2.50 2.75 3.25 3.75 4.25 4.75 5.25 SUPPLY VOLTAGE (V)
2.70
3.21
3.72
4.23
4.74
5.25
SUPPLY VOLTAGE (V)
8
_______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
Pin Description
PIN MAX1496 1 2 MAX1447/ MAX1498 31 32 NAME VNEG REFFUNCTION -2.5V Charge-Pump Voltage Output. Connect a 0.1F capacitor to GND. Negative Reference Voltage Input. For internal-reference operation, connect REF- to GND. For external-reference operation, bypass REF- to GND with a 0.1F capacitor and set VREFfrom -2.2V to +2.2V, provided VREF+ > VREF-. Positive Reference Voltage Input. For internal-reference operation, connect a 4.7F capacitor from REF+ to GND. For external-reference operation, bypass REF+ to GND with a 0.1F capacitor and set VREF+ from -2.2V to +2.2V, provided VREF+ > VREF-. Positive Analog Input. Positive side of fully differential analog input. Bypass AIN+ to GND with a 0.1F or greater capacitor. Negative Analog Input. Negative side of fully differential analog input. Bypass AIN- to GND with a 0.1F or greater capacitor. Segment Current Controller. Connect to ground through a resistor to set the segment current. See Table 5 for current selection. Ground Analog and Digital Circuit Supply Voltage. Connect VDD to a +2.7V to +5.25V power supply. Bypass VDD to GND with a 0.1F capacitor and a 4.7F capacitor. Internal-Reference Logic Input. Connect to GND to select external-reference mode. Connect to DVDD for the MAX1447/MAX1498 and VDD for the MAX1496 to select the internalreference mode. Range Logic Input. RANGE controls the fully differential analog input range. Connect to GND for the 2V input range. Connect to DVDD (MAX1447/MAX1498) or VDD (MAX1496) for the 200mV input range. Decimal-Point Logic-Input 1. Controls the decimal point of the LED. See the Decimal-Point Control section. Decimal-Point Logic-Input 2. Controls the decimal point of the LED. See the Decimal-Point Control section. Peak Logic Input. Connect to DVDD (MAX1447/MAX1498) or VDD (MAX1496) to display the highest ADC value on the LED. Connect to GND to disable the peak function. Hold Logic Input. Connect to DVDD (MAX1447/MAX1498) or VDD (MAX1496) to hold the current ADC value on the LED. Connect to GND to update the LED at a rate of 2.5Hz and disable the hold function. For the MAX1447, only placing the device into hold mode initiates an offset mismatch calibration. Assert HOLD high for a minimum of 2s to ensure the completion of offset mismatch calibration. Digit 0 Driver Digit 1 Driver Ground for LED Display Digit Driver Digit 2 Driver
MAX1447/MAX1496/MAX1498
3
1
REF+
4 5 6 7 8
2 3 4 5 --
AIN+ AINISET GND VDD
9
8
INTREF
10
9
RANGE
11 12 13
10 11 12
DPSET1 DPSET2 PEAK
14
13
HOLD
15 16 17 18
14 15 16 17
DIG0 DIG1 GLED DIG2
_______________________________________________________________________________________
9
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Pin Description (continued)
PIN MAX1496 19 20 21 22 23 24 25 26 27 28 -- -- -- -- MAX1447/ MAX1498 18 20 21 22 23 24 25 26 27 28 6 7 19 29 NAME DIG3 SEGA SEGB SEGC SEGD SEGE VLED SEGF SEGG SEGDP AVDD DVDD DIG4 LED_EN Digit 3 Driver Segment A Driver Segment B Driver Segment C Driver Segment D Driver Segment E Driver LED Display Segment Driver Supply. Connect to a +2.7V to +5.25V supply. Bypass with a 0.1F capacitor to GLED. Segment F Driver Segment G Driver Segment DP Driver Analog Positive Supply Voltage. Connect AVDD to a +2.7V to +5.25V power supply. Bypass AVDD to GND with a 0.1F capacitor. Digital Positive Supply Voltage. Connect DVDD to a +2.7V to +5.25V power supply. Bypass DVDD to GND with a 0.1F capacitor. Digit 4 Driver Active-High LED Enable. The MAX1447/MAX1498 display driver turns off when the LED_EN is driven to logic low. The MAX1447/MAX1498 LED display driver turns on when LED_EN is driven to logic high. Decimal-Point Enable Input. Controls the decimal point of the LED. See the Decimal-Point Control section. Connect to DVDD (MAX1447/MAX1498) or VDD (MAX1496) to enable the decimal point. FUNCTION
--
30
DPON
Detailed Description
The MAX1447/MAX1496/MAX1498 low-power, highly integrated ADCs with LED drivers convert a 2V differential input voltage (one count is equal to 100V for the MAX1447/MAX1498 and 1mV for the MAX1496) with a sigma-delta ADC and output the result to an LED. An additional 200mV input range (one count is equal to 10V for the MAX1447/MAX1498 and 100V for the MAX1496) is available to measure small signals with increased resolution. The devices operate from a single 2.7V to 5.25V power supply and offer 3.5-digit (MAX1496) or 4.5-digit (MAX1447/MAX1498) conversion results. An internal 2.048V reference, internal charge pump, and a high-accuracy on-chip oscillator eliminate external components. The devices also feature on-chip buffers for the differential input signal and external-reference inputs, allowing
10
direct interface with high-impedance signal sources. In addition, they use continuous internal offset-calibration and offer >100dB of 50Hz and 60Hz line-noise rejection. Other features include data hold and peak detection and overrange/underrange detection.
Analog Input Protection
Internal protection diodes limit the analog input range from VNEG to (AV DD + 0.3V) for the MAX1447/ MAX1498, and from VNEG to (V DD + 0.3V) for the MAX1496. If the analog input exceeds this range, limit the input current to 10mA.
Internal Analog Input/Reference Buffers
The MAX1447/MAX1496/MAX1498 analog input/reference buffers allow the use of high-impedance signal sources. The input buffers' common-mode input range allows the analog inputs and the reference to range from -2.2V to +2.2V.
______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
AVDD DVDD ISET VLED
+2.5V
TIMING SEG1
AIN+ ADC AININPUT BUFFERS REF+
BINARY-TOBCD CONVERTERS
LED DRIVER
SEGF SEGDP DIG0 DIG4 LED_EN GLED
REF-
OSCILLATOR CLOCK -2.5V 2.048V BANDGAP REFERENCE +2.5V CHARGE PUMP MAX1447 MAX1498 -2.5V
CLK DPON DPSET1 DPSET2 RANGE PEAK HOLD
A = 1.22
GND
VNEG
Figure 1. MAX1447/MAX1498 Functional Diagram
Modulator
The MAX1447/MAX1496/MAX1498 perform analog-todigital conversions using a single-bit, 3rd-order, sigmadelta modulator. The sigma-delta modulator converts the input signal into a digital pulse train whose average duty cycle represents the digitized signal information. The modulator quantizes the input signal at a much higher sample rate than the bandwidth of the input. The MAX1447/MAX1496/MAX1498 modulator provides 3rd-order frequency shaping of the quantization noise resulting from the single-bit quantizer. The modulator is fully differential for maximum signal-to-noise ratio and minimum susceptibility to power-supply noise. A singlebit data stream is then presented to the digital filter to remove the frequency-shaped quantization noise.
The SINC4 filter has a settling time of four output data periods (4 x 200ms). The MAX1447/MAX1496/MAX1498 have 25% overrange capability built into the modulator and digital filter. The digital filter is optimized for the fCLK equal to 4.9152MHz. The frequency response of the SINC4 filter is calculated as follows: 1 (1 - Z -N ) 4 H(z) = N (1 - Z -1)
4 f sin N fm 1 H(f) = N f sin fm
Digital Filtering
The MAX1447/MAX1496/MAX1498 contain an on-chip digital lowpass filter that processes the data stream from the modulator using a SINC4 response: sin(x) 4 x
where N is the oversampling ratio, and fm = N x output data rate = 5Hz.
______________________________________________________________________________________
11
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
0
A B F E DP D DIGIT 3 F D C A G B C F E DP D DIGIT 2 A G B C F E DP D DIGIT 1 A G B C F E DP D DIGIT 0 A G B C DP
-40
GAIN (dB)
-80
G DIGIT 4
-120
-160
Figure 3. Segment Connection for the MAX1447/MAX1498 (4.5 Digits)
-200 0 10 20 30 40 50 60
A B F D G DIGIT 3 C E DP D DIGIT 2 F A G B C F E DP D DIGIT 1 A G B C F E DP D DIGIT 0 A G B C DP
FREQUENCY (Hz)
Figure 2. Frequency Response of the SINC4 Filter (Notch at 50Hz and 60Hz)
Filter Characteristics Figure 2 shows the filter frequency response. The SINC4 characteristic -3dB cutoff frequency is 0.228 times the first notch frequency (5Hz). The oversampling ratio (OSR) for the MAX1496 is 128 and the OSR for the MAX1447/MAX1498 is 1024. The output data rate for the digital filter corresponds to the positioning of the first notch of the filter's frequency response. The notches of the SINC4 filter are repeated at multiples of the first notch frequency. The SINC4 filter provides an attenuation of better than 100dB at these notches. For example, 50Hz is equal to 10 times the first notch frequency and 60Hz is equal to 12 times the first notch frequency. For large step changes at the input, allow a settling time of 800ms before valid data is read.
Figure 4. Segment Connection for the MAX1496 (3.5 Digits)
Table 1. LED Priority Table
HOLD 1 0 0 PEAK X 1 0 DISPLAY VALUES FORM Hold value Peak value Latest ADC result
X = Don't care.
Internal Clock
The MAX1447/MAX1496/MAX1498 contain an internal oscillator. Using the internal oscillator saves board space by removing the need for an external clock source. The oscillator is optimized to give 50Hz and 60Hz power-supply and common-mode rejection.
The bipolar input range of the analog input/reference buffers allows this device to accept negative inputs with high source impedances. Connect a 0.1F capacitor from VNEG to GND.
LED Driver
The MAX1447/MAX1498 have a 4.5-digit common-cathode display driver, and the MAX1496 has a 3.5-digit common-cathode display driver. Figures 3 and 4 show the connection schemes for a standard seven-segment LED display. The LED update rate is 2.5Hz. The MAX1447/MAX1496/MAX1498 automatically display the results of the ADC, if desired (Table 1).
Charge Pump
The MAX1447/MAX1496/MAX1498 contain an internal charge pump to provide the negative supply voltage for the internal analog input/reference buffers.
12
______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
SEGDP SEGG SEGF SEGE SEGD SEGC SEGB SEGA A B C D E F G DP A B C D E F G DP
DIGIT 1 A F E D G B C DP F E
DIGIT 2 A G B C DP D
Figure 5 shows a typical common-cathode configuration for two digits. In common-cathode configuration, the cathodes of all LEDs in a digit are connected together. Each segment driver of the MAX1447/ MAX1496/MAX1498 connects to its corresponding LED's anodes. For example, segment driver SEGA connects to all LED segments designated as A. Similar configurations are used for other segment drivers. The MAX1447/MAX1496/MAX1498 use a multiplexing scheme to drive one digit at a time. The scan rate is fast enough to make the digits appear to be lit. Figures 6 and 7 show data-timing diagrams for the MAX1447/ MAX1496/MAX1498, where T is the display scan period (typically around 1/512Hz or 1.9531ms for the MAX1447/MAX1498, and 1/640Hz or 1.5625ms for the MAX1496). TON in Figures 6 and 7 denotes the amount of time each digit is on and is calculated as follows:
TON = T 1.95312ms = = 390.60s (MAX1447 / MAX1498) 5 5 T 1.5625ms = = 390.60s (MAX1496) 4 4
MAX1447/MAX1496/MAX1498
Figure 5. Two-Digit Common-Cathode Configuration
TON =
TON DIGIT 4 (MSD) DIGIT 3 DIGIT 2 DIGIT 1 DIGIT 0 (LSD) T DATA 4 MSD 3 2 1 0 LSD 4 3 2 1 0 4
Figure 6. LED Voltage Waveform--MAX1447/MAX1498
TON DIGIT 3 (MSD) DIGIT 2 DIGIT 1 DIGIT 0 (LSD) T DATA 3 MSD 2 1 0 LSD 3 2 1 0 3 2 1
Figure 7. LED Voltage Waveform--MAX1496 ______________________________________________________________________________________ 13
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Decimal-Point Control
The MAX1447/MAX1496/MAX1498 allow for full decimal-point control and feature leading-zero suppression. Use the DPON, DPSET1, and DPSET2 bits in the control register to set the value of the decimal point (Tables 2 and 3). The MAX1447/MAX1496/MAX1498 overrange and underrange display is shown in Table 4.
Reference
The MAX1447/MAX1496/MAX1498 reference sets the full-scale range of the ADC transfer function. With a nominal 2.048V reference, the ADC full-scale range is 2V with RANGE = GND. With RANGE = DV DD (MAX1447/MAX1498) or VDD (MAX1496), the full-scale range is 200mV. A decreased reference voltage decreases full-scale range (see the Transfer Functions section). The MAX1447/MAX1496/MAX1498 accept either an external reference or an internal reference (INTREF). The INTREF logic selects the reference mode. For internal-reference operation, set INTREF to DVDD (MAX1447/MAX1498) or VDD (MAX1496), connect REFto GND, and bypass REF+ to GND with a 4.7F capacitor. The internal reference provides a nominal 2.048V source between REF+ and GND. The internal-reference temperature coefficient is typically 40ppm/C.
Leading-Zero Suppression
The MAX1447/MAX1496/MAX1498 include a leadingzero suppression circuitry to turn off unnecessary zeros. For example, when DPSET1 and DPSET2 = [0,0], 0.0 is displayed instead of 000.0. This feature saves a substantial amount of power from being wasted.
Interdigit Blanking
The MAX1447/MAX1496/MAX1498 also include an interdigit blanking circuitry. Without this feature, it is possible to see a faint digit next to a digit that is completely on. The interdigit blanking circuitry prevents bleeding over into the next digit for a short period of time. The typical interdigit blanking time is 4s.
Table 2. Decimal-Point Control Table--MAX1447/MAX1498
DPON 0 0 0 0 1 1 1 1 DPSET1 0 0 1 1 0 0 1 1 DPSET2 0 1 0 1 0 1 0 1 DISPLAY OUTPUT 18888 18888 18888 18888 1888.8 188.88 18.888 1.8888 ZERO INPUT READING 0 0 0 0 0.0 0.00 0.000 0.0000
Table 3. Decimal-Point Control Table--MAX1496
DPSET1 0 0 1 1 DPSET2 0 1 0 1 DISPLAY OUTPUT 188.8 18.88 1888 1.888 ZERO INPUT READING 0.0 0.00 0 0.000
X = Don't care.
Table 4. LED During Overrange and Underrange Conditions
CONDITION Overrange Underrange MAX1496 1--MAX1447/MAX1498 1----
-1---
-1----
14
______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
For external-reference operation, set INTREF to GND. REF+ and REF- are fully differential. For a valid external-reference input, VREF+ must be greater than VREF-. Bypass REF+ and REF- with a 0.1F or greater capacitor to GND in external-reference mode. Figure 8 shows the MAX1447/MAX1496/MAX1498 operating with an external differential reference. In this figure, REF- is connected to the top of the strain gauge and REF+ is connected to the midpoint of the resistordivider of the supply. Figure 9 shows the MAX1447/MAX1496/MAX1498 operating with an external single-ended reference. In this figure, REF- is connected to GND and REF+ is driven with an external 2.048V reference. Bypass REF+ to GND with a 0.47F capacitor.
Offset Calibration
The MAX1447/MAX1496/MAX1498 offer on-chip offset calibration. The device offset calibrates during every conversion cycle.
MAX1447/MAX1496/MAX1498
Enhanced Offset Calibration (MAX1447 Only)
Enhanced offset calibration is a more accurate calibration method that is needed in the case of the 200mV range and 4.5-digit resolution. In addition to enhanced offset calibration at power-up, the MAX1447 performs enhanced calibration on demand by connecting HOLD to AVDD for > 2s.
Peak
The MAX1447/MAX1496/MAX1498 feature peak-detection circuitry. When activated (PEAK connected to AV DD for the MAX1498/MAX1447 or to VDD for the MAX1496), the devices display only the highest voltage measured to the LED. First, the current ADC result is displayed. The new ADC conversion result is compared to the current result. If the new value is larger than the previous peak value, the new value is displayed. If the new value is less than the previous peak value, the display remains unchanged. Connect PEAK to GND to clear the peak value and disable the peak function.
Applications Information
Power-On Reset
At power-up, the digital filter and modulator circuits reset. The MAX1447/MAX1498 allows 6s for the reference to stabilize before performing enhanced offset calibration. During these 6s, the MAX1447/MAX1498 display 1.2V to 1.5V when a stable reference is detected. If a valid reference is not found, the MAX1447/MAX1498 time out after 6s and begin enhanced offset calibration. Enhanced offset calibration typically lasts 2s. The MAX1447/MAX1498 begin converting after enhanced offset calibration.
ANALOG SUPPLY FERRITE BEAD 0.1F 4.7F AVDD REF+ 0.1F RREF REF0.1F ACTIVE GAUGE R DVDD 0.1F 4.7F
THERMOCOUPLE JUNCTION AIN+
MAX1447 MAX1496 MAX1498
MAX1447 MAX1496 MAX1498
AIN0.1F +5V
+2.048V AIN+ 0.1F AIN0.1F R GND 0.47F
MAX6062
REF+ REFGND
DUMMY GAUGE
Figure 8. Strain-Gauge Application with the MAX1447/MAX1496/ MAX1498
Figure 9. Thermocouple Application with the MAX1447/MAX1496/ MAX1498 15
______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Hold
The MAX1447/MAX1496/MAX1498 feature data-hold circuitry. When activated (HOLD is set to AVDD for the MAX1447/MAX1498 or to VDD for the MAX1496), the device holds the current reading on the LED.
Transfer Functions
Figures 10-13 show the transfer functions of the MAX1447/MAX1496/MAX1498. The transfer function for the MAX1447/MAX1498 with AIN+ - AIN- 0, RANGE = GND is: V -V COUNT = 1.024 AIN+ AIN- x 20,000 VREF + - VREF - The transfer function for the MAX1447/MAX1498 with AIN+ - AIN- < 0, RANGE = GND is: V -V COUNT = 1.024 AIN+ AIN- x 20,000 + 1 VREF + - VREF - The transfer function for the MAX1447/MAX1498 with AIN+ - AIN- 0, RANGE = DVDD is: V -V COUNT = 1.024 AIN+ AIN- x 20,000 x 10 VREF + - VREF - The transfer function for the MAX1447/MAX1498 with AIN+ - AIN- < 0, RANGE = DVDD is:
V -V COUNT = 1.024 AIN+ AIN- x 20,000 x 10 + 1 VREF + - VREF -
Strain-Gauge Measurement
Connect the differential inputs of the MAX1447/ MAX1496/MAX1498 to the bridge network of the strain gauge. In Figure 8, the analog supply voltage powers the bridge network and the MAX1447/MAX1496/ MAX1498, along with the reference voltage. The MAX1447/MAX1496/MAX1498 handle an analog input voltage range of 200mV and 2V full scale. The analog/reference inputs of the parts allow the analog input range to have an absolute value of anywhere between -2.2V and +2.2V.
Thermocouple Measurement
Figure 9 shows a connection from a thermocouple to the MAX1447/MAX1496/MAX1498. In this application, the MAX1447/MAX1496/MAX1498 take advantage of the on-chip input buffers that allow large source impedances on the front end. The decoupling capacitors reduce noise pickup from the thermocouple leads. To place the differential voltage from the thermocouple at a suitable common-mode voltage, the AIN- input of the MAX1447/MAX1496/MAX1498 is biased to GND. Use an external temperature sensor, such as the DS75, and a microcontroller to perform cold-junction temperature compensation.
LED 1---19,999
LED 1---19,999
2 1 0 -0 -1 -2
2 1 0 -0 -1 -2
-19,999 -1----2V -100V 0 100V ANALOG INPUT VOLTAGE +2V
-19,999 -1----200mV -10V 0 10V ANALOG INPUT VOLTAGE +200mV
Figure 10. MAX1447/MAX1498 Transfer Function, 2V Range
Figure 11. MAX1447/MAX1498 Transfer Function, 200mV Range
16
______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
The transfer function for the MAX1496 with AIN+ - AIN 0, RANGE = GND is: V -V COUNT = 1.024 AIN+ AIN- x 2000 VREF + - VREF - The transfer function for the MAX1496 with AIN+ - AIN< 0, RANGE = GND is: V -V COUNT = 1.024 AIN+ AIN- x 2000 + 1 VREF + - VREF - The transfer function for the MAX1496 with AIN+ - AIN 0, RANGE = VDD is: V -V COUNT = 1.024 AIN+ AIN- x 2000 x 10 VREF + - VREF - The transfer function for the MAX1496 with AIN+ - AIN< 0, RANGE = VDD is:
V -V COUNT = 1.024 AIN+ AIN- x 2000 x 10 + 1 VREF + - VREF -
Supplies, Layout, and Bypassing
Power up AVDD and DVDD (MAX1447/MAX1498) and VDD (MAX1496) before applying an analog input and external-reference voltage to the device. If this is not possible, limit the current into these inputs to 50mA. When the analog and digital supplies come from the same source, isolate the digital supply from the analog supply with a low-value resistor (10) or ferrite bead. For best performance, ground the MAX1447/ MAX1496/MAX1498 to the analog ground plane of the circuit board. Avoid running digital lines under the device as this can couple noise onto the IC. Run the analog ground plane under the MAX1447/MAX1496/MAX1498 to minimize coupling of digital noise. Make the power-supply lines to the MAX1447/MAX1496/MAX1498 as wide as possible to provide low-impedance paths and reduce the effects of glitches on the power-supply line. Shield fast-switching signals, such as clocks, with digital ground to avoid radiating noise to other sections of the board. Avoid running clock signals near the analog inputs. Avoid crossover of digital and analog signals. Running traces that are on opposite sides of the board at right angles to each other reduces feedthrough effects. Good decoupling is important when using high-resolution ADCs. Decouple the supplies with 0.1F ceramic capacitors to GND. Place these components as close to the device as possible to achieve the best decoupling.
MAX1447/MAX1496/MAX1498
LED 1--1999
LED 1--1999
2 1 0 -0 -1 -2
2 1 0 -0 -1 -2
-1999 -1---200mV -100V 0 100V ANALOG INPUT VOLTAGE +200mV
-1999 -1---2V -1mV 0 1mV ANALOG INPUT VOLTAGE +2V
Figure 12. MAX1496 Transfer Function, 200mV Range
Figure 13. MAX1496 Transfer Function, 2V Range
______________________________________________________________________________________
17
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Selecting Segment Current
A resistor from ISET to ground sets the current for each LED segment. See Table 5 for more detail. Use the following formula to set the segment current: 1.20V ISEG = x 450 RISET RISET values below 25k increase the ISEG. However, the internal current-limit circuit limits the ISEG to less than 30mA. At higher ISEG values, proper operation of the device is not guaranteed. In addition, the power dissipated may exceed the package power-dissipation limit.
Table 5. Segment-Current Selection
RISET (k) 25 50 100 500 >2500 ISEG (mA) 21.6 10.8 5.4 1.1 LED driver disabled
Computing Power Dissipation
The following can be used to compute power dissipation: PD = (VLED x IVLED ) + (VLED - VDIODE) (DUTY x ISEG x N) + VSUPPLY x ISUPPLY VLED = LED driver supply voltage IVLED = VLED bias current VDIODE = LED forward voltage DUTY = segment ON time during each digit ON time ISEG = segment current set by RISET N = number of segments driven (worst case is eight) VSUPPLY = supply voltage of the part ISUPPLY = supply current from VDD for the MAX1496 or AVDD + DVDD for the MAX1447/MAX1498. Dissipation Example For ISEG = 25.5mA, N = 8, DUTY = 127 / 128, VDIODE = 1.5V at 25.5mA, VLED = VSUPPLY = 5.25V: PD = (5.25 x 2mA) + (5.25V - 1.5) [(127 / 128) x 25.5mA x 8)] + 5.25 x 1.080mA PD = 0.7751W 28-Pin SSOP-Package Example For the 28-pin SSOP package (TJA = 1 / 0.009496 = +105.3C/W), the maximum allowed ambient temperature TA is given by: TJ (max) = TA + (PD x TJA) = +125C = TA + (0.7751W x +105.3C/W) TA = +43C Thus, the device cannot operate safely at a maximum package temperature of +85C. The power dissipates in the part need to be lowered.
Choosing Supply Voltage to Minimize Power Dissipation
The MAX1447/MAX1496/MAX1498 drive a peak current of 25.5mA into LEDs with a 2.2V forward voltage drop when operated from a supply voltage of at least 3.0V. Therefore, the minimum voltage drop across the internal LED drivers is (3.0V - 2.2V) = 0.8V. The MAX1447/ MAX1496/MAX1498 sink (8 x 25.5mA = 204mA) when the outputs are operating and the LED segment drivers are at full current. For a 3.3V supply, the MAX1447/ MAX1496/MAX1498 dissipate (3.3V - 2.2V) x 204 = 224.4mW. If a higher supply voltage is used, the driver absorbs a higher voltage, and the driver's power dissipation increases accordingly. However, if the LEDs used have a higher forward voltage drop than 2.2V, the supply voltage must be raised accordingly to ensure that the driver always has at least 0.8V headroom. For a VLED supply voltage of 2.7V, the maximum LED forward voltage is 1.9V to ensure 0.8V driver headroom. The voltage drop across the drivers with a nominal +5V supply (5.0V - 2.2V = 2.8V) is almost three times the drop across the drivers with a nominal 3.3V supply (3.3V - 2.2V = 1.1V). Therefore, the driver's power dissipation increases three times. The power dissipation in the part causes the junction temperature to rise accordingly. In the high ambient temperature case, the total junction temperature may be very high (>+125C). At higher junction temperatures, the ADC performance degrades. To ensure the dissipation limit for the MAX1447/MAX1496/MAX1498 is not exceeded and the ADC performance is not degraded, a diode can be inserted between the power supply and VLED.
18
______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
(PD x TJA) max = (+125C) - (+85C) = +40C PD (max) = +40C /+105.3C/W = 380mW (VLED - VDIODE) = [380mW - (5.25V x 2mA) - 5.25V x 1.080mA] / [(127 / 128) x 25.5mA x 8] VLED - VDIODE = 1.854V VLED - VDIODE should have the following condition to ensure it operates safely: 0.8V < VLED - VDIODE < 1.854V 28-Pin PDIP-Package Example PD x TJA (max) = (+125C) - (+85C) = +40C PD (max) = +40C / +70C/W = 571mW VLED - VDIODE = [571mW - (5.25V x 2mA) - 5.25V x 1.080mA] / [(127 / 128) x 25.5mA x 8] VLED - VDIODE = 2.80V For a 28-pin PDIP package, VLED - VDIODE should have the following condition to ensure it operates safely: 0.8V < VLED - VDIODE < 2.80V 32-Pin TQFP Package The MAX1447/MAX1498 TQFP package can operate safely for all supply voltages provided VDIODE > 1.5V.
Rollover Error
Rollover error is defined as the absolute-value difference between a near positive full-scale reading and near negative full-scale reading. Rollover error is tested by applying a full-scale positive voltage, swapping AIN+ and AIN-, and adding the results.
MAX1447/MAX1496/MAX1498
Zero Input Reading
Ideally, with AIN+ connected to AIN-, the MAX1447/ MAX1496/MAX1498 LED displays zero. Zero input reading is the measured deviation from the ideal zero and the actual measured point.
Gain Error
Gain error is the amount of deviation between the measured full-scale transition point and the ideal full-scale transition point.
Common-Mode Rejection
Common-mode rejection (CMR) is the ability of a device to reject a signal that is common to both input terminals. The common-mode signal can be either an AC or a DC signal or a combination of the two. CMR is often expressed in decibels.
Definitions
INL
Integral nonlinearity (INL) is the deviation of the values on an actual transfer function from a straight line. This straight line is either a best-straight-line fit or a line drawn between the end points of the transfer function, once offset and gain errors have been nullified. INL for the MAX1447/MAX1496/MAX1498 is measured using the end-point method.
Normal-Mode 50Hz and 60Hz Rejection (Simultaneously)
Normal-mode rejection is a measure of how much output changes when 50Hz and 60Hz signals are injected into only one of the differential inputs. The MAX1447/ MAX1496/MAX1498 sigma-delta converter uses its internal digital filter to provide normal-mode rejection to both 50Hz and 60Hz power-line frequencies simultaneously.
Power-Supply Rejection Ratio
Power-supply rejection ratio (PSRR) is the ratio of the input supply change (in volts) to the change in the converter output (in volts). It is typically measured in decibels.
DNL
Differential nonlinearity (DNL) is the difference between an actual step width and the ideal value of 1 LSB. A DNL error specification of less than 1 LSB guarantees no missing codes and a monotonic transfer function.
______________________________________________________________________________________
19
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Typical Operating Circuits
VIN
AIN+ AINVLED DVDD
SEGA-SEGDP SEGMENT CONNECTIONS
DIG0-DIG4 DIGIT CONNECTIONS DPSET2 DPSET1 RANGE INTREF PEAK HOLD
MAX1447 MAX1498
10F
0.1F AVDD 0.1F LISO 25k ISET VNEG 0.1F GND REFREF+ 4.7F GLED
DPON
2.7V TO 5.25V
10F
VIN
AIN+ AINVLED VDD
SEGA-SEGDP SEGMENT CONNECTIONS
DIG0-DIG3 DIGIT CONNECTIONS DPSET2 DPSET1
MAX1496
RANGE INTREF PEAK HOLD
10F
0.1F
2.7V TO 5.25V 25k
ISET
VNEG 0.1F
GND
REF-
REF+ 4.7F
GLED
20
______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
Pin Configurations
TOP VIEW
LED_EN SEGDP DPON VNEG SEGG VNEG 1 REF- 2 REF+ 3 AIN+ 4 AIN- 5 ISET 6 GND 7 VDD 8 INTREF 9 RANGE 10 DPSET1 11 DPSET2 12 PEAK 13 HOLD 14 28 SEGDP 27 SEGG 26 SEGF 25 VLED 24 SEGE AIN+ AINISET GND AVDD DVDD INTREF 2 3 4 5 6 7 8 9 RANGE 10 DPSET1 11 DPSET2 12 PEAK 13 HOLD 14 DIG0 15 DIG1 16 GLED 23 SEGD 22 SEGC 21 SEGB REF+ 1 VLED SEGF REF-
MAX1447/MAX1496/MAX1498
32
31
30
29
28
27
26
25 24 SEGE
MAX1496
23 SEGD 22 SEGC 21 SEGB 20 SEGA 19 DIG3 18 DIG2 17 GLED 16 DIG1 15 DIG0
MAX1447 MAX1498
20 SEGA 19 DIG4 18 DIG3 17 DIG2
SSOP/PDIP
TQFP
Chip Information
TRANSISTOR COUNT: 80,000 PROCESS: BiCMOS
______________________________________________________________________________________
21
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
32L/48L,TQFP.EPS
22
______________________________________________________________________________________
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
SSOP.EPS
MAX1447/MAX1496/MAX1498
2
1
INCHES DIM A A1 B C E H D E e H L MIN 0.068 0.002 0.010 MAX 0.078 0.008 0.015
MILLIMETERS MIN 1.73 0.05 0.25 MAX 1.99 0.21 0.38 D D D D D INCHES MIN 0.239 0.239 0.278 0.317 0.397 MAX 0.249 0.249 0.289 0.328 0.407 MILLIMETERS MIN 6.07 6.07 7.07 8.07 10.07 MAX 6.33 6.33 7.33 8.33 10.33 N 14L 16L 20L 24L 28L
0.20 0.09 0.004 0.008 SEE VARIATIONS 0.205 0.301 0.025 0 0.212 0.311 0.037 8 5.20 7.65 0.63 0 5.38 7.90 0.95 8 0.0256 BSC 0.65 BSC
N
A C B e D A1 L
NOTES: 1. D&E DO NOT INCLUDE MOLD FLASH. 2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006"). 3. CONTROLLING DIMENSION: MILLIMETERS. 4. MEETS JEDEC MO150. 5. LEADS TO BE COPLANAR WITHIN 0.10 MM.
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE, SSOP, 5.3 MM
APPROVAL DOCUMENT CONTROL NO. REV.
21-0056
1 1
C
______________________________________________________________________________________
23
3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers MAX1447/MAX1496/MAX1498
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
PDIPW.EPS
N
D1
INCHES DIM A A1 A2 A3 B B1 C D1 E E1 e eA eB L MAX MIN 0.200 0.015 0.125 0.175 0.080 0.055 0.020 0.016 0.065 0.045 0.012 0.008 0.009 0.005 0.625 0.600 0.525 0.575 0.100 BSC 0.600 BSC 0.700 0.120 0.150
MILLIMETERS MAX MIN 5.08 0.39 3.18 4.45 2.03 1.40 0.51 0.41 1.65 1.14 0.21 0.30 0.13 0.22 15.24 15.87 13.34 14.61 2.54 BSC 15.24 BSC 3.05 17.78 3.81
1
TOP VIEW
E D
A1 A3
E1 A2 0-15
A L e B1 B
VARIATIONS: INCHES
C eA eB
MILLIMETERS MIN 31.24 36.32 51.44 MAX 32.26 37.34 52.71 N MS011 24 AA 28 40 AB AC
DIM D D D
MIN 1.230 1.430 2.025
MAX 1.270 1.470 2.075
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE, .600" PDIP
APPROVAL DOCUMENT CONTROL NO. REV.
21-0044
B
1 1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

▲Up To Search▲

Price & Availability of MAX1496EAI

	To Download MAX1496EAI Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .